diff options
| author | Aaron Durbin <adurbin@chromium.org> | 2015-12-09 16:00:18 -0600 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2015-12-11 00:20:08 +0100 |
| commit | 929b60267c72f4e2fbb23125d4c96c5dd275272b (patch) | |
| tree | f59f4e972af66c7b86e3535e8261ce5e061f4eaa /src/drivers/intel/fsp1_1/include/fsp/romstage.h | |
| parent | bc6e7c0905d6490ba54aee264b8dcaa09ed50ea3 (diff) | |
fsp1_1: supply fsp version to mrc_cache API
The memory init code needs to match the saved mrc data. To
ensure that invariant holds supply the FSP version when
using the mrc cache API.
BUG=chrome-os-partner:46050
BRANCH=None
TEST=Built and booted on glados. Verified version mismatch checking
works.
Change-Id: I3f6dd19cb15a18761d34509749adafc89a72ed2d
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/12701
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/drivers/intel/fsp1_1/include/fsp/romstage.h')
| -rw-r--r-- | src/drivers/intel/fsp1_1/include/fsp/romstage.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/drivers/intel/fsp1_1/include/fsp/romstage.h b/src/drivers/intel/fsp1_1/include/fsp/romstage.h index 7d2df7cf8e..eddf3462c4 100644 --- a/src/drivers/intel/fsp1_1/include/fsp/romstage.h +++ b/src/drivers/intel/fsp1_1/include/fsp/romstage.h @@ -27,7 +27,7 @@ #include <soc/pm.h> /* chip_power_state */ struct romstage_params { - unsigned long bist; + uint32_t fsp_version; struct chipset_power_state *power_state; struct pei_data *pei_data; void *chipset_context; |