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| author | Mariusz Szafranski <mariuszx.szafranski@intel.com> | 2017-09-26 12:21:13 +0200 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-10-04 02:56:33 +0000 |
| commit | 94b64431f3de19c79e7494d9ff25f9ebd1ab7cbc (patch) | |
| tree | e07e95cd9985f36c2b7ae17d88a8973d006d2399 /src/drivers/intel/fsp1_1/include/fsp/romstage.h | |
| parent | 6fbf98a462ccbb3fd5939750c0efc5bafc9fe8d5 (diff) | |
configs: Add intel/harcuvar FSP 2.0 sample configuration
Add Intel Harcuvar CRB FSP 2.0 sample configuration.
Change-Id: I60ec6921eca17a910cd1b9f8b0b86a1a1bf9bbea
Signed-off-by: Mariusz Szafranski <mariuszx.szafranski@intel.com>
Reviewed-on: https://review.coreboot.org/21693
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: FEI WANG <wangfei.jimei@gmail.com>
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/drivers/intel/fsp1_1/include/fsp/romstage.h')
0 files changed, 0 insertions, 0 deletions