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author | Thaminda Edirisooriya <thaminda@google.com> | 2015-08-26 14:54:31 -0700 |
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committer | Ronald G. Minnich <rminnich@gmail.com> | 2015-09-10 17:26:38 +0000 |
commit | 95ba4c87f5f4802e2afaeae38003db5e7235864a (patch) | |
tree | 5e1c146e873afc58695ee22a056f5546b6cc8bed /src/drivers/intel/fsp1_1/include/fsp/api.h | |
parent | b094583c6fd9d330be28ed6feb1c1140de07ff37 (diff) |
riscv-trap-handling: Add implementation for trap calls in riscv
RISCV requires the bios/bootloader to set up an interface by which it
can get information about memory, talk to host devices, etc. Put
implementation for spike in
src/mainboard/emulation/spike-riscv/spike_util.c, and
src/arch/riscv/trap_handler.c
Change-Id: Ie1d5f361595e48fa6cc1fac25485ad623ecdc717
Signed-off-by: Thaminda Edirisooriya <thaminda@google.com>
Reviewed-on: http://review.coreboot.org/11368
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/drivers/intel/fsp1_1/include/fsp/api.h')
0 files changed, 0 insertions, 0 deletions