diff options
| author | Furquan Shaikh <furquan@chromium.org> | 2017-05-15 14:35:15 -0700 |
|---|---|---|
| committer | Furquan Shaikh <furquan@google.com> | 2017-05-19 21:21:47 +0200 |
| commit | 30221b45e02f0be8940debd8ad5690c77d6a97a6 (patch) | |
| tree | 0771086cabe7259abef22d80a29377d2661bc795 /src/drivers/intel/fsp1_0 | |
| parent | fc1a123aa7392fe7900b466e6a6f089733fec1ee (diff) | |
drivers/spi/spi_flash: Pass in flash structure to fill in probe
Instead of making all SPI drivers allocate space for a spi_flash
structure and fill it in, udpate the API to allow callers to pass in a
spi_flash structure that can be filled by the flash drivers as
required. This also cleans up the interface so that the callers can
maintain and free the space for spi_flash structure as required.
BUG=b:38330715
Change-Id: If6f1b403731466525c4690777d9b32ce778eb563
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://review.coreboot.org/19705
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/drivers/intel/fsp1_0')
| -rw-r--r-- | src/drivers/intel/fsp1_0/fastboot_cache.c | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/src/drivers/intel/fsp1_0/fastboot_cache.c b/src/drivers/intel/fsp1_0/fastboot_cache.c index b57f382b27..906b356b90 100644 --- a/src/drivers/intel/fsp1_0/fastboot_cache.c +++ b/src/drivers/intel/fsp1_0/fastboot_cache.c @@ -157,6 +157,7 @@ void update_mrc_cache(void *unused) struct mrc_data_container *current = cbmem_find(CBMEM_ID_MRCDATA); struct mrc_data_container *cache, *cache_base; u32 cache_size; + struct spi_flash flash; if (!current) { printk(BIOS_ERR, "No fast boot cache in cbmem. Can't update flash.\n"); @@ -189,8 +190,7 @@ void update_mrc_cache(void *unused) /* 1. use spi_flash_probe() to find the flash, then... */ spi_init(); - struct spi_flash *flash = spi_flash_probe(0, 0); - if (!flash) { + if (spi_flash_probe(0, 0, &flash)) { printk(BIOS_DEBUG, "Could not find SPI device\n"); return; } @@ -209,7 +209,8 @@ void update_mrc_cache(void *unused) "Need to erase the MRC cache region of %d bytes at %p\n", cache_size, cache_base); - spi_flash_erase(flash, to_flash_offset(cache_base), cache_size); + spi_flash_erase(&flash, to_flash_offset(cache_base), + cache_size); /* we will start at the beginning again */ cache = cache_base; @@ -217,7 +218,7 @@ void update_mrc_cache(void *unused) /* 4. write mrc data with spi_flash_write() */ printk(BIOS_DEBUG, "Write MRC cache update to flash at %p\n", cache); - spi_flash_write(flash, to_flash_offset(cache), + spi_flash_write(&flash, to_flash_offset(cache), current->mrc_data_size + sizeof(*current), current); } |