aboutsummaryrefslogtreecommitdiff
path: root/src/drivers/intel/fsp1_0/fsp_util.h
diff options
context:
space:
mode:
authorJulius Werner <jwerner@chromium.org>2019-03-05 16:53:33 -0800
committerPatrick Georgi <pgeorgi@google.com>2019-03-08 08:33:24 +0000
commitcd49cce7b70e80b4acc49b56bb2bb94370b4d867 (patch)
tree8e89136e2da7cf54453ba8c112eda94415b56242 /src/drivers/intel/fsp1_0/fsp_util.h
parentb3a8cc54dbaf833c590a56f912209a5632b71f49 (diff)
coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)
This patch is a raw application of find src/ -type f | xargs sed -i -e 's/IS_ENABLED\s*(CONFIG_/CONFIG(/g' Change-Id: I6262d6d5c23cabe23c242b4f38d446b74fe16b88 Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/31774 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/drivers/intel/fsp1_0/fsp_util.h')
-rw-r--r--src/drivers/intel/fsp1_0/fsp_util.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/drivers/intel/fsp1_0/fsp_util.h b/src/drivers/intel/fsp1_0/fsp_util.h
index d5d0160e49..f781329d21 100644
--- a/src/drivers/intel/fsp1_0/fsp_util.h
+++ b/src/drivers/intel/fsp1_0/fsp_util.h
@@ -19,7 +19,7 @@
#include <chipset_fsp_util.h>
#include "fsp_values.h"
-#if IS_ENABLED(CONFIG_ENABLE_MRC_CACHE)
+#if CONFIG(ENABLE_MRC_CACHE)
int save_mrc_data(void *hob_start);
void *find_and_set_fastboot_cache(void);
#endif
@@ -61,7 +61,7 @@ void printguid(EFI_GUID *guid);
#define EFI_HOB_TYPE_HANDOFF 0x0001
#define EFI_HOB_TYPE_MEMORY_POOL 0x0007
-#if IS_ENABLED(CONFIG_ENABLE_MRC_CACHE)
+#if CONFIG(ENABLE_MRC_CACHE)
#define MRC_DATA_ALIGN 0x1000
#define MRC_DATA_SIGNATURE (('M'<<0)|('R'<<8)|('C'<<16)|('D'<<24))