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authorTim Wawrzynczak <twawrzynczak@chromium.org>2020-05-29 14:58:16 -0600
committerPatrick Georgi <pgeorgi@google.com>2020-07-07 17:23:34 +0000
commite4d8ebcef783f89fb9645d26d339dfb33065530f (patch)
tree64c3e2a82717910329216e4f5ed68430cea9c1d9 /src/drivers/intel/dptf
parentbb5c255907378a5c5798b5dab3616df1e63d3ee7 (diff)
dptf: Add support for Fan and TSR options
DPTF has several options on how to control the fan (fine-grained speed control, minimum speed change in percentage points, and whether or not the DPTF device should notify the Fan if it detects low speed). Individual TSRs can also set GTSH, which is the amount of hysteresis inherent in the measurement, either from circuitry (if analog), or in firmware (if digital). BUG=b:143539650 TEST=compiles Change-Id: I42d789d877da28c163e394d7de5fb1ff339264eb Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41891 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Diffstat (limited to 'src/drivers/intel/dptf')
-rw-r--r--src/drivers/intel/dptf/chip.h27
-rw-r--r--src/drivers/intel/dptf/dptf.c19
2 files changed, 46 insertions, 0 deletions
diff --git a/src/drivers/intel/dptf/chip.h b/src/drivers/intel/dptf/chip.h
index 0d2c25cf61..28403a83bd 100644
--- a/src/drivers/intel/dptf/chip.h
+++ b/src/drivers/intel/dptf/chip.h
@@ -17,6 +17,33 @@ struct drivers_intel_dptf_config {
struct dptf_fan_perf fan_perf[DPTF_MAX_FAN_PERF_STATES];
struct dptf_power_limits power_limits;
} controls;
+
+ /* Note that all values in this struct are optional */
+ struct {
+ struct {
+ /* True means _FSL is percentages, False means _FSL is Control values */
+ bool fine_grained_control;
+ /*
+ * Recommended minimum step size in percentage points to adjust fan
+ * speed when utilizing fine-grained control (1-9)
+ */
+ uint8_t step_size;
+ /*
+ * True means the platform will issue a Notify (0x80) to the fan device
+ * if a a low fan speed is detected
+ */
+ bool low_speed_notify;
+ } fan;
+ struct {
+ /*
+ * The amount of hysteresis implemented in circuitry or in the platform
+ * EC's firmware implementation (using the GTSH object)
+ */
+ uint8_t hysteresis;
+ /* Name applied to TSR (using the _STR object) */
+ const char *desc;
+ } tsr[DPTF_MAX_TSR];
+ } options;
};
#endif /* _DRIVERS_INTEL_DPTF_CHIP_H_ */
diff --git a/src/drivers/intel/dptf/dptf.c b/src/drivers/intel/dptf/dptf.c
index 15a7d1297b..1fe9653eb7 100644
--- a/src/drivers/intel/dptf/dptf.c
+++ b/src/drivers/intel/dptf/dptf.c
@@ -62,6 +62,12 @@ static const char *dptf_acpi_name(const struct device *dev)
static void dptf_fill_ssdt(const struct device *dev)
{
struct drivers_intel_dptf_config *config = config_of(dev);
+ enum dptf_participant p;
+ bool tsr_en[DPTF_MAX_TSR] = {false};
+ int i;
+
+ for (p = DPTF_TEMP_SENSOR_0, i = 0; p <= DPTF_TEMP_SENSOR_3; ++p, ++i)
+ tsr_en[i] = is_participant_used(config, p);
dptf_write_active_policies(config->policies.active,
DPTF_MAX_ACTIVE_POLICIES);
@@ -77,6 +83,19 @@ static void dptf_fill_ssdt(const struct device *dev)
dptf_write_fan_perf(config->controls.fan_perf, DPTF_MAX_FAN_PERF_STATES);
dptf_write_power_limits(&config->controls.power_limits);
+ /* Fan options */
+ dptf_write_fan_options(config->options.fan.fine_grained_control,
+ config->options.fan.step_size,
+ config->options.fan.low_speed_notify);
+
+ /* TSR options */
+ for (p = DPTF_TEMP_SENSOR_0, i = 0; p <= DPTF_TEMP_SENSOR_3; ++p, ++i) {
+ if (tsr_en[i]) {
+ dptf_write_tsr_hysteresis(config->options.tsr[i].hysteresis);
+ dptf_write_STR(config->options.tsr[i].desc);
+ }
+ }
+
printk(BIOS_INFO, "\\_SB.DPTF: %s at %s\n", dev->chip_ops->name, dev_path(dev));
}