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authorAaron Durbin <adurbin@chromium.org>2013-08-14 11:27:40 -0500
committerPatrick Georgi <patrick@georgi-clan.de>2013-12-21 08:55:54 +0100
commitebad1765542d63fd873d62fb52ca9e150c9b6291 (patch)
tree7b0ddb44365826f596c57a50f0a673dc7c8cd38b /src/drivers/i2c/rtd2132/chip.h
parent08637d3c9e408161cfed33bec381a632e2283d79 (diff)
rtd2132: implement full configuration
It has been disseminated that the RTD2132 chip needs to be fully programmed for settings to take affect. Most of the settings are note documented very well and present themselves as magic values. Also, the wait time for starting the sequence needs to be bumped from 2ms to 60ms. Lastly, expose all the known settings through devicetree. Change-Id: I9eeea9c4a13ec20b8ce1c5297e43c4dd793d90e5 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/65857 Reviewed-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/4471 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src/drivers/i2c/rtd2132/chip.h')
-rw-r--r--src/drivers/i2c/rtd2132/chip.h22
1 files changed, 22 insertions, 0 deletions
diff --git a/src/drivers/i2c/rtd2132/chip.h b/src/drivers/i2c/rtd2132/chip.h
index 34ae91a3fe..2cf08270d3 100644
--- a/src/drivers/i2c/rtd2132/chip.h
+++ b/src/drivers/i2c/rtd2132/chip.h
@@ -18,6 +18,28 @@
*/
struct drivers_i2c_rtd2132_config {
+ /* Panel Power Sequencing. All units in ms. */
+ u16 t1; /* Delay from panel Vcc enable to LVDS output enable. */
+ u16 t2; /* Delay from LVDS output enable to PWM output enable. */
+ u16 t3; /* Delay from PWM output enable to backlight output enable. */
+ u16 t4; /* Delay from backlight output disable to PWM output disable. */
+ u16 t5; /* Delay from PWM output disable to LVDS output disable. */
+ u16 t6; /* Delay from LVDS output disable to panel Vcc disable. */
+ u16 t7; /* Delay between tweo panel power on/off sequence. */
+
+ /*
+ * LVDS swap.
+ * 0x00 - Normal
+ * 0x01 - Mirror
+ * 0x02 - P/N
+ * 0x03 - Mirror + P/N
+ * 0x04 - R/L
+ *
+ * Dual Support or in bit 7:
+ * 0x80 - Dual Swap
+ */
+ u8 lvds_swap;
+
/*
* LVDS Spread Spectrum Clock
* 0x00 = DISABLED