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authorRex-BC Chen <rex-bc.chen@mediatek.corp-partner.google.com>2021-11-18 15:20:42 +0800
committerHung-Te Lin <hungte@chromium.org>2021-12-08 11:32:37 +0000
commit9f01bbf410fcf6cb4eaf06863b0185501112984d (patch)
tree41c415010e7dd8e86435d7c130f7cf25659260f7 /src/drivers/i2c/ck505/chip.h
parenteb102ccbd6a41d55478a8b9a95ef1f093ecaf82a (diff)
mb/google/corsola: Enable Chrome EC
Initialize SPI bus 1 for Chrome EC control. TEST=build pass BUG=b:202871018 Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com> Change-Id: I7d032d595f7ca1dbed3de4dfe308ff4be64333cd Reviewed-on: https://review.coreboot.org/c/coreboot/+/59941 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Diffstat (limited to 'src/drivers/i2c/ck505/chip.h')
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