drivers/genesyslogic/gl9763e: Add driver for Genesys Logic GL9763E

The device is a PCIe to eMMC bridge controller to be used in the
Chromebook as the boot disk. The datasheet name is GL9763E and
the revision is 02.

The patch sets single request AXI, disables ASPM L0s and enables SSC.

Signed-off-by: Ben Chuang <benchuanggli@gmail.com>
Change-Id: I158c79f5ac6e559f335b6b50092469c7b1646c56
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43751
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

4 files changed, 79 insertions, 0 deletions

diff --git a/src/drivers/genesyslogic/gl9763e/Kconfig b/src/drivers/genesyslogic/gl9763e/Kconfig
new file mode 100644
index 0000000000..c254707f66
--- /dev/null
+++ b/src/drivers/genesyslogic/gl9763e/Kconfig
@@ -0,0 +1,2 @@
+config DRIVERS_GENESYSLOGIC_GL9763E
+	bool
diff --git a/src/drivers/genesyslogic/gl9763e/Makefile.inc b/src/drivers/genesyslogic/gl9763e/Makefile.inc
new file mode 100644
index 0000000000..61a63e6231
--- /dev/null
+++ b/src/drivers/genesyslogic/gl9763e/Makefile.inc
@@ -0,0 +1 @@
+ramstage-$(CONFIG_DRIVERS_GENESYSLOGIC_GL9763E) += gl9763e.c
diff --git a/src/drivers/genesyslogic/gl9763e/gl9763e.c b/src/drivers/genesyslogic/gl9763e/gl9763e.c
new file mode 100644
index 0000000000..48e520bde2
--- /dev/null
+++ b/src/drivers/genesyslogic/gl9763e/gl9763e.c
@@ -0,0 +1,53 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+/* Driver for Genesys Logic GL9763E */
+
+#include <console/console.h>
+#include <device/device.h>
+#include <device/path.h>
+#include <device/pci.h>
+#include <device/pci_ops.h>
+#include <device/pci_ids.h>
+#include "gl9763e.h"
+
+static void gl9763e_init(struct device *dev)
+{
+	printk(BIOS_INFO, "GL9763E: init\n");
+	pci_dev_init(dev);
+
+	/* Set VHS (Vendor Header Space) to be writable */
+	pci_update_config32(dev, VHS, ~VHS_REV_MASK, VHS_REV_W);
+	/* Set single AXI request */
+	pci_or_config32(dev, SCR, SCR_AXI_REQ);
+	/* Disable L0s support */
+	pci_and_config32(dev, CFG_REG_2, ~CFG_REG_2_L0S);
+	/* Set SSC to 30000 ppm */
+	pci_update_config32(dev, PLL_CTL_2, ~PLL_CTL_2_MAX_SSC_MASK, MAX_SSC_30000PPM);
+	/* Enable SSC */
+	pci_or_config32(dev, PLL_CTL, PLL_CTL_SSC);
+	/* Set VHS to read-only */
+	pci_update_config32(dev, VHS, ~VHS_REV_MASK, VHS_REV_R);
+}
+
+static struct device_operations gl9763e_ops = {
+	.read_resources		= pci_dev_read_resources,
+	.set_resources		= pci_dev_set_resources,
+	.enable_resources	= pci_dev_enable_resources,
+	.ops_pci		= &pci_dev_ops_pci,
+	.init			= gl9763e_init,
+};
+
+static const unsigned short pci_device_ids[] = {
+	PCI_DEVICE_ID_GLI_9763E,
+	0
+};
+
+static const struct pci_driver genesyslogic_gl9763e __pci_driver = {
+	.ops		= &gl9763e_ops,
+	.vendor		= PCI_VENDOR_ID_GLI,
+	.devices	= pci_device_ids,
+};
+
+struct chip_operations drivers_generic_genesyslogic_ops = {
+	CHIP_NAME("Genesys Logic GL9763E")
+};
diff --git a/src/drivers/genesyslogic/gl9763e/gl9763e.h b/src/drivers/genesyslogic/gl9763e/gl9763e.h
new file mode 100644
index 0000000000..fd9c6ba5c2
--- /dev/null
+++ b/src/drivers/genesyslogic/gl9763e/gl9763e.h
@@ -0,0 +1,23 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+/* Definitions for Genesys Logic GL9763E */
+
+#include <types.h>
+
+#define VHS		0x884
+#define   VHS_REV_MASK	(0xF << 16)
+#define   VHS_REV_R	(0x0 << 16)
+#define   VHS_REV_M	(0x1 << 16)
+#define   VHS_REV_W	(0x2 << 16)
+#define SCR		0x8E0
+#define   SCR_AXI_REQ	BIT(9)
+
+#define CFG_REG_2	0x8A4
+#define   CFG_REG_2_L0S	BIT(11)
+
+#define PLL_CTL		0x938
+#define   PLL_CTL_SSC	BIT(19)
+
+#define PLL_CTL_2			0x93C
+#define   PLL_CTL_2_MAX_SSC_MASK	(0xFFFF << 16)
+#define   MAX_SSC_30000PPM		(0xF5C3 << 16)