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authorKane Chen <kane.chen@intel.corp-partner.google.com>2023-08-02 15:29:21 +0800
committerFelix Held <felix-coreboot@felixheld.de>2023-08-04 14:05:15 +0000
commit2d8bc345cbc274aac402df7e5232885074591f38 (patch)
tree43d1949539384ace74e12ee39b0ab238713ab154 /src/drivers/genesyslogic/gl9755
parent4202a2cbf6263ae68e839f60f9bd243745f44521 (diff)
soc/intel/mtl: Change default for debug consent from 3 to 6
USB DBC is very helpful for SoC debug. TraceHub needs to be enabled in coreboot if debug consent == 2 or 4. Debug consent == 6 enables USB DBC without TraceHub enabled. This patch updates the Kconfig help text to meet PlatformDebugOption in MTL and changes debug consent to 6 in default to provide basic SoC debug capability. TEST=Boot to OS on screebo and DBC connection is OK. Change-Id: Ic12528bdd8b1feda7f1b65045c863341f932d3a2 Signed-off-by: Kane Chen <kane.chen@intel.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/76880 Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Reviewed-by: Jakub Czapiga <jacz@semihalf.com> Reviewed-by: Subrata Banik <subratabanik@google.com> Reviewed-by: Kapil Porwal <kapilporwal@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/drivers/genesyslogic/gl9755')
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