diff options
| author | Ben Chuang <benchuanggli@gmail.com> | 2020-09-03 16:02:46 +0800 |
|---|---|---|
| committer | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2020-09-18 15:49:15 +0000 |
| commit | ff17b31dfb576d369e5f06c425f50c9e56bf2b5f (patch) | |
| tree | 9aa94e09666b92fdd3aefbcff945b9824692a1ab /src/drivers/genesyslogic/gl9755/gl9755.h | |
| parent | 8ad2b8be253601e3b7bf1a318a0458442e8571b0 (diff) | |
drivers/genesyslogic/gl9755: Add driver for Genesys Logic GL9755
The device is a PCIe Gen2 to SD 4.0 card reader controller to be
used in the Chromebook. The datasheet name is GL9755S and the revision
is 05.
The patch sets LTR value.
Signed-off-by: Ben Chuang <benchuanggli@gmail.com>
Change-Id: I16048dde348be248c748d50ca4a8a62c8a781430
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45062
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/drivers/genesyslogic/gl9755/gl9755.h')
| -rw-r--r-- | src/drivers/genesyslogic/gl9755/gl9755.h | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/src/drivers/genesyslogic/gl9755/gl9755.h b/src/drivers/genesyslogic/gl9755/gl9755.h new file mode 100644 index 0000000000..2d20faf695 --- /dev/null +++ b/src/drivers/genesyslogic/gl9755/gl9755.h @@ -0,0 +1,11 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +/* Definitions for Genesys Logic GL9755 */ + +#define CFG 0x800 +#define CFG_EN 0x1 +#define LTR 0x5C +#define SNOOP_VALUE 0x25 +#define SNOOP_SCALE (0x3 << 10) +#define NO_SNOOP_VALUE (0x25 << 16) +#define NO_SNOOP_SCALE (0x3 << 26) |