diff options
author | Furquan Shaikh <furquan@google.com> | 2020-11-26 21:29:44 -0800 |
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committer | Furquan Shaikh <furquan@google.com> | 2020-12-09 14:23:06 +0000 |
commit | 640f0ce93ffe50bac5816f085fa953f67cab0878 (patch) | |
tree | 48f914a7640af47cdc630cbf0ca73325c4032ba1 /src/drivers/generic | |
parent | ba75c4cc499ec6ac972116a78ab03d8a0d0cc5de (diff) |
mb/google/volteer: Reorganize FMAP
This change reorganizes FMAP for volteer to make use of the lower
16MiB of the SPI flash for RW_SECTION_A and RW_MISC in addition to
RW_LEGACY. This is now possible because TGL supports memory mapping of
BIOS region greater than 16MiB.
Following changes are made in chromeos.fmd as part of this:
1. Move RW_SECTION_A and RW_MISC to lower 16MiB.
2. Reduce size of RW_LEGACY to 2MiB since we longer need to use it as
a placeholder in the lower half of the SPI flash.
3. Reduce size of RW_ELOG to 4KiB as coreboot does not support a
larger region for ELOG.
4. Increase WP_RO to 8MiB to allow larger space for firmware
screens. GBB size is thus increased to 448KiB.
BUG=b:171534504
Signed-off-by: Furquan Shaikh <furquan@google.com>
Change-Id: I0c3c0af94183a80c23d196422d3c8cf960b9d9f5
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48187
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Diffstat (limited to 'src/drivers/generic')
0 files changed, 0 insertions, 0 deletions