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author | Andrey Petrov <andrey.petrov@intel.com> | 2016-02-25 14:17:45 -0800 |
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committer | Martin Roth <martinroth@google.com> | 2016-03-08 13:44:26 +0100 |
commit | 42c4e886c8c9fe35d38f20e3df7e912a538c4f0f (patch) | |
tree | 6d91af4e71fb72e91847c37c81812bd709db5985 /src/drivers/ati/ragexl/Makefile.inc | |
parent | 465fc13c0e69ddcf38168b62104fca37b91bdd68 (diff) |
drivers/intel/fsp2_0: Add SiliconInit API
This adds SiliconInit API that is needed to be called after memory
has been trained. This call is needed to let the blob do various
initialisations of IP blocks.
Change-Id: I35e02f22174c8392e55ac869265a19c4309932e5
Signed-off-by: Andrey Petrov <andrey.petrov@intel.com>
Reviewed-on: https://review.coreboot.org/13799
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/drivers/ati/ragexl/Makefile.inc')
0 files changed, 0 insertions, 0 deletions