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authorJitao Shi <jitao.shi@mediatek.com>2020-02-20 17:00:03 +0800
committerHung-Te Lin <hungte@chromium.org>2021-03-27 10:02:18 +0000
commit7de5677643294ae021f7012e45dce416639224b2 (patch)
tree8f56388129cd41f9cf18af492fa69bd34b35beac /src/drivers/analogix
parentf9650771d3cb7e0244ef6caa5b7f7c67d5425a40 (diff)
drivers/analogix: Increase the clock tolerance from 0.1% to 2%
Increase the input tolerance to avoid panel scroll. BUG=b:173603645 BRANCH=kukui TEST=None Change-Id: I4af96f58876932175b28fc0a8543720ebd7b5deb Signed-off-by: Jitao Shi <jitao.shi@mediatek.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39025 Reviewed-by: Yu-Ping Wu <yupingso@google.com> Reviewed-by: Hung-Te Lin <hungte@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/drivers/analogix')
-rw-r--r--src/drivers/analogix/anx7625/anx7625.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/drivers/analogix/anx7625/anx7625.c b/src/drivers/analogix/anx7625/anx7625.c
index 9f0b2e1f2c..e37e047bbd 100644
--- a/src/drivers/analogix/anx7625/anx7625.c
+++ b/src/drivers/analogix/anx7625/anx7625.c
@@ -381,7 +381,7 @@ static int anx7625_dsi_video_config(uint8_t bus, struct display_timing *dt)
ret |= anx7625_reg_write(bus, RX_P1_ADDR, MIPI_PLL_N_NUM_7_0,
(n & 0xff));
/* diff */
- ret |= anx7625_reg_write(bus, RX_P1_ADDR, MIPI_DIGITAL_ADJ_1, 0x37);
+ ret |= anx7625_reg_write(bus, RX_P1_ADDR, MIPI_DIGITAL_ADJ_1, 0x3d);
ret |= anx7625_odfc_config(bus, post_divider - 1);