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authorSubrata Banik <subratabanik@google.com>2022-02-01 19:01:36 +0530
committerMartin Roth <martinroth@google.com>2022-02-03 17:12:04 +0000
commit480e7e5ac88e35ce3ac8a1d30bac72b062d68878 (patch)
treeb3f059e1fc61524f3074e09002a712bbdc88b694 /src/drivers/amd
parent1d886639ce680010a21e64d7122dfcfa92a9f505 (diff)
soc/intel/apollolake: Rename PWRMBASE macro and function
This patch ensures PWRMBASE macro name and function to get PWRMBASE address on APL SoC is aligned with other IA SoC. PMC_BAR0 -> PCH_PWRM_BASE_ADDRESS read_pmc_mmio_bar() -> pmc_mmio_regs() Additionally, make `pmc_mmio_regs` a public function for other IA common code may need to get access to this function. BUG=None TEST=None Signed-off-by: Subrata Banik <subratabanik@google.com> Change-Id: I3a61117f34b60ed6eeb9bda3ad853f0ffe6390f7 Reviewed-on: https://review.coreboot.org/c/coreboot/+/61532 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/drivers/amd')
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