diff options
author | Arthur Heymans <arthur@aheymans.xyz> | 2021-05-14 13:19:43 +0200 |
---|---|---|
committer | Arthur Heymans <arthur@aheymans.xyz> | 2022-05-16 07:05:03 +0000 |
commit | 46b409da483ebfc8d9c868c713f5ad68b62c808e (patch) | |
tree | f6fd02685ea558df7447dc3449d3fba787c09183 /src/drivers/amd | |
parent | 645dde77940d12979166555b17dbc81cda1bc48b (diff) |
arch/x86/postcar: Set up postcar MTRR in C code
Setting up postcar MTRRs is done when invd is already called so there
is no reason to do this in assembly anymore.
This also drops the custom code for Quark to set up MTRRs.
TESTED on foxconn/g41m and hermes/prodrive that MTRR are properly set
in postcar & ramstage.
Change-Id: I5ec10e84118197a04de0a5194336ef8bb049bba4
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54299
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/drivers/amd')
-rw-r--r-- | src/drivers/amd/agesa/mtrr_fixme.c | 2 | ||||
-rw-r--r-- | src/drivers/amd/agesa/romstage.c | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/src/drivers/amd/agesa/mtrr_fixme.c b/src/drivers/amd/agesa/mtrr_fixme.c index 1313b5d6ec..b8b8ef05e0 100644 --- a/src/drivers/amd/agesa/mtrr_fixme.c +++ b/src/drivers/amd/agesa/mtrr_fixme.c @@ -58,7 +58,7 @@ void recover_postcar_frame(struct postcar_frame *pcf, int s3resume) /* Replicate non-UC MTRRs as left behind by AGESA. */ - for (i = 0; i < pcf->ctx.max_var_mtrrs; i++) { + for (i = 0; i < pcf->mtrr->max_var_mtrrs; i++) { mask = rdmsr(MTRR_PHYS_MASK(i)); base = rdmsr(MTRR_PHYS_BASE(i)); u32 size = ~(mask.lo & ~0xfff) + 1; diff --git a/src/drivers/amd/agesa/romstage.c b/src/drivers/amd/agesa/romstage.c index ec798eece7..648a0451b3 100644 --- a/src/drivers/amd/agesa/romstage.c +++ b/src/drivers/amd/agesa/romstage.c @@ -78,7 +78,7 @@ static void romstage_main(void) romstage_handoff_init(cb->s3resume); - postcar_frame_init(&pcf, HIGH_ROMSTAGE_STACK_SIZE); + postcar_frame_init(&pcf); recover_postcar_frame(&pcf, cb->s3resume); run_postcar_phase(&pcf); |