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authorElyes Haouas <ehaouas@noos.fr>2022-11-09 14:00:44 +0100
committerFelix Held <felix-coreboot@felixheld.de>2022-11-18 16:00:45 +0000
commit799c3219146c8d246ef95f1fdb83dc7bc1f2be61 (patch)
treee6dcc99fe3b577d28b602311232779eff8dda4cb /src/drivers/amd/agesa
parent9cbbba68b650933cf552f9e1b969f08e463c641f (diff)
cbmem_top_chipset: Change the return value to uintptr_t
Get rid of a lot of casts. Change-Id: I93645ef5dd270905ce421e68e342aff4c331eae6 Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69078 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jakub Czapiga <jacz@semihalf.com>
Diffstat (limited to 'src/drivers/amd/agesa')
-rw-r--r--src/drivers/amd/agesa/romstage.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/drivers/amd/agesa/romstage.c b/src/drivers/amd/agesa/romstage.c
index 5c3d90494f..132cb3e485 100644
--- a/src/drivers/amd/agesa/romstage.c
+++ b/src/drivers/amd/agesa/romstage.c
@@ -93,8 +93,8 @@ static void ap_romstage_main(void)
halt();
}
-void *cbmem_top_chipset(void)
+uintptr_t cbmem_top_chipset(void)
{
/* Top of CBMEM is at highest usable DRAM address below 4GiB. */
- return (void *)restore_top_of_low_cacheable();
+ return restore_top_of_low_cacheable();
}