diff options
| author | Julius Werner <jwerner@chromium.org> | 2019-03-05 16:53:33 -0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-03-08 08:33:24 +0000 |
| commit | cd49cce7b70e80b4acc49b56bb2bb94370b4d867 (patch) | |
| tree | 8e89136e2da7cf54453ba8c112eda94415b56242 /src/drivers/amd/agesa/cache_as_ram.S | |
| parent | b3a8cc54dbaf833c590a56f912209a5632b71f49 (diff) | |
coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)
This patch is a raw application of
find src/ -type f | xargs sed -i -e 's/IS_ENABLED\s*(CONFIG_/CONFIG(/g'
Change-Id: I6262d6d5c23cabe23c242b4f38d446b74fe16b88
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31774
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/drivers/amd/agesa/cache_as_ram.S')
| -rw-r--r-- | src/drivers/amd/agesa/cache_as_ram.S | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/drivers/amd/agesa/cache_as_ram.S b/src/drivers/amd/agesa/cache_as_ram.S index 09302d7d0e..4f0bb3fd75 100644 --- a/src/drivers/amd/agesa/cache_as_ram.S +++ b/src/drivers/amd/agesa/cache_as_ram.S @@ -107,7 +107,7 @@ _cache_as_ram_setup: pushl %eax call romstage_main -#if IS_ENABLED(CONFIG_POSTCAR_STAGE) +#if CONFIG(POSTCAR_STAGE) /* We do not return. Execution continues with run_postcar_phase() * calling to chipset_teardown_car below. @@ -138,7 +138,7 @@ chipset_teardown_car: /* Register %esp is preserved in AMD_DISABLE_STACK. */ AMD_DISABLE_STACK -#if IS_ENABLED(CONFIG_POSTCAR_STAGE) +#if CONFIG(POSTCAR_STAGE) jmp *%esp |