diff options
author | Michał Żygowski <michal.zygowski@3mdeb.com> | 2019-11-24 16:32:05 +0100 |
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committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-12-11 22:47:10 +0000 |
commit | 1b12b64dab57151d1f04d13d09c1afbf16a7485f (patch) | |
tree | a912c3447ddc7528fa320d8c254c8b403e79cb55 /src/drivers/amd/agesa/bootblock.c | |
parent | b643d3df8adbc933e02d8c8c7dcc61cc60b65afb (diff) |
AGESA, binaryPI: implement C bootblock
Modify CAR setup to work in bootblock. Provide bootblock C file with
necessary C bootblock functions. Additionally chache the ROM and set
the MMCONF base before jumping to bootblock main.
Change-Id: I29916a96f490ff717c69dc7cd565d74a83dbfb0d
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36914
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/drivers/amd/agesa/bootblock.c')
-rw-r--r-- | src/drivers/amd/agesa/bootblock.c | 47 |
1 files changed, 47 insertions, 0 deletions
diff --git a/src/drivers/amd/agesa/bootblock.c b/src/drivers/amd/agesa/bootblock.c new file mode 100644 index 0000000000..3763b98a3a --- /dev/null +++ b/src/drivers/amd/agesa/bootblock.c @@ -0,0 +1,47 @@ +/* + * This file is part of the coreboot project. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <bootblock_common.h> +#include <halt.h> +#include <timestamp.h> +#include <amdblocks/amd_pci_mmconf.h> +#include <amdblocks/biosram.h> +#include <cpu/amd/msr.h> +#include <cpu/x86/mtrr.h> + +#define EARLY_VMTRR_FLASH 6 + +static void set_early_mtrrs(void) +{ + /* Cache the ROM to speed up booting */ + set_var_mtrr(EARLY_VMTRR_FLASH, OPTIMAL_CACHE_ROM_BASE, + OPTIMAL_CACHE_ROM_SIZE, MTRR_TYPE_WRPROT); +} + +asmlinkage void bootblock_c_entry(uint64_t base_timestamp) +{ + enable_pci_mmconf(); + set_early_mtrrs(); + + bootblock_main_with_basetime(base_timestamp); +} + +asmlinkage void ap_bootblock_c_entry(void) +{ + enable_pci_mmconf(); + set_early_mtrrs(); + + void (*ap_romstage_entry)(void) = get_ap_entry_ptr(); + ap_romstage_entry(); /* execution does not return */ + halt(); +} |