diff options
author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2017-09-08 07:14:17 +0300 |
---|---|---|
committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2017-09-26 10:07:07 +0000 |
commit | d4955f0ade18cafde4a3ea20885eb9fbdc5b4514 (patch) | |
tree | 71b6e96cc01fbb58d6bfdd50b6c55e431634724d /src/drivers/amd/agesa/Makefile.inc | |
parent | 0f6c0b1a6f062be702fd0b10a6c591c42f982b63 (diff) |
AGESA: Move API interface under drivers/
New AGESA support files will be used for binaryPI
platforms as well. Furthermore, some of those should
move from split nb/ sb/ directories to soc/, so move
support files for the API under drivers/.
Change-Id: I549788091de91f61de8b9adc223d52ffb5732235
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/21455
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/drivers/amd/agesa/Makefile.inc')
-rw-r--r-- | src/drivers/amd/agesa/Makefile.inc | 44 |
1 files changed, 44 insertions, 0 deletions
diff --git a/src/drivers/amd/agesa/Makefile.inc b/src/drivers/amd/agesa/Makefile.inc new file mode 100644 index 0000000000..4d3dbf5cb9 --- /dev/null +++ b/src/drivers/amd/agesa/Makefile.inc @@ -0,0 +1,44 @@ +# +# This file is part of the coreboot project. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; version 2 of the License. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# + +ifeq ($(CONFIG_DRIVERS_AMD_PI),y) + +ifneq ($(CONFIG_AGESA_LEGACY_WRAPPER)$(CONFIG_BINARYPI_LEGACY_WRAPPER),y) + +romstage-y += romstage.c +romstage-y += mtrr_fixme.c +romstage-y += state_machine.c + +ramstage-y += state_machine.c + +cpu_incs-y += $(src)/drivers/amd/agesa/cache_as_ram.S +postcar-y += cache_as_ram.S + +else + +romstage-y += heapmanager.c + +endif + +romstage-y += def_callouts.c +romstage-y += eventlog.c + +ramstage-y += def_callouts.c +ramstage-y += eventlog.c +ramstage-y += heapmanager.c +ramstage-y += acpi_tables.c + +romstage-$(CONFIG_CPU_AMD_AGESA) += oem_s3.c +ramstage-$(CONFIG_CPU_AMD_AGESA) += oem_s3.c s3_mtrr.c + +endif |