eric patch

        1. x86_setup_mtrr take address bit.
        2. generic ht, pcix, pcie beidge...
        3. scan bus and reset_bus
        4. ht read ctrl to decide if the ht chain
           is ready
        5. Intel e7520 and e7525 support
        6. new ich5r support
        7. intel sb 6300 support.

yhlu patch
	1. split x86_setup_mtrrs to fixed and var
	2. if (resource->flags & IORESOURCE_FIXED ) return; in device.c pick_largest_resource
	3. in_conherent.c K8_SCAN_PCI_BUS


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1982 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

1 files changed, 60 insertions, 0 deletions

diff --git a/src/devices/pciexp_device.c b/src/devices/pciexp_device.c
new file mode 100644
index 0000000000..5422a8eb18
--- /dev/null
+++ b/src/devices/pciexp_device.c
@@ -0,0 +1,60 @@
+/* (c) 2005 Linux Networx GPL see COPYING for details */
+
+#include <console/console.h>
+#include <device/device.h>
+#include <device/pci.h>
+#include <device/pci_ids.h>
+#include <device/pciexp.h>
+
+
+static void pciexp_tune_dev(device_t dev)
+{
+	unsigned cap;
+
+	cap = pci_find_capability(dev, PCI_CAP_ID_PCIE);
+	if (!cap) {
+		/* error... */
+		return;
+	}
+	printk_debug("PCIEXP: tunning %s\n", dev_path(dev));
+#warning "IMPLEMENT PCI EXPRESS TUNING"
+}
+
+unsigned int pciexp_scan_bus(struct bus *bus, 
+	unsigned min_devfn, unsigned max_devfn, 
+	unsigned int max)
+{
+	device_t child;
+	max = pci_scan_bus(bus, min_devfn, max_devfn, max);
+	for(child = bus->children; child; child = child->sibling) {
+		if (	(child->path.u.pci.devfn < min_devfn) ||
+			(child->path.u.pci.devfn > max_devfn))
+		{
+			continue;
+		}
+		pciexp_tune_dev(child);
+	}
+	return max;
+}
+
+
+unsigned int pciexp_scan_bridge(device_t dev, unsigned int max)
+{
+	return do_pci_scan_bridge(dev, max, pciexp_scan_bus);
+}
+
+/** Default device operations for PCI Express bridges */
+static struct pci_operations pciexp_bus_ops_pci = {
+	.set_subsystem = 0,
+};
+
+struct device_operations default_pciexp_ops_bus = {
+	.read_resources   = pci_bus_read_resources,
+	.set_resources    = pci_dev_set_resources,
+	.enable_resources = pci_bus_enable_resources,
+	.init		  = 0,
+	.scan_bus	  = pciexp_scan_bridge,
+	.enable           = 0,
+	.reset_bus        = pci_bus_reset,
+	.ops_pci          = &pciexp_bus_ops_pci,
+};