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authorEric Biederman <ebiederm@xmission.com>2003-09-02 17:16:48 +0000
committerEric Biederman <ebiederm@xmission.com>2003-09-02 17:16:48 +0000
commit0ac6b41e70b2df365f8579c6e14214c42ab4c91b (patch)
tree40e26dbeec991f1df5e43da3e1ee9f25151b89d0 /src/devices/Config.lb
parente9a271e32c53076445ef70da8aec8201c82693ec (diff)
- 1.1.4
Major restructuring of hypertransport handling. Major rewerite of superio/NSC/pc87360 as a proof of concept for handling superio resources dynamically Updates to hard_reset handling when resetting because of the need to change hypertransport link speeds and widths. (a) No longer assume the boot is good just because we get to a hard reset point. (b) Set a flag to indicate that the BIOS triggered the reset so we don't decrement the boot counter. Updates to arima/hdama mptable so it tracks the new bus numbers git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1097 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/devices/Config.lb')
-rw-r--r--src/devices/Config.lb1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/devices/Config.lb b/src/devices/Config.lb
index 063aa1db92..6da04ee2e4 100644
--- a/src/devices/Config.lb
+++ b/src/devices/Config.lb
@@ -2,4 +2,5 @@ object device.o
object root_device.o
object device_util.o
object pci_device.o
+object hypertransport.o
object chip.o