Rename ECAM-specific MMCONF Kconfigs

Currently, the MMCONF Kconfigs only support the Enhanced Configuration
Access mechanism (ECAM) method for accessing the PCI config address
space.  Some platforms have a different way of mapping the PCI config
space to memory.  This patch renames the following configs to
make it clear that these configs are ECAM-specific:

- NO_MMCONF_SUPPORT --> NO_ECAM_MMCONF_SUPPORT
- MMCONF_SUPPORT --> ECAM_MMCONF_SUPPORT
- MMCONF_BASE_ADDRESS --> ECAM_MMCONF_BASE_ADDRESS
- MMCONF_BUS_NUMBER --> ECAM_MMCONF_BUS_NUMBER
- MMCONF_LENGTH --> ECAM_MMCONF_LENGTH

Please refer to CB:57861 "Proposed coreboot Changes" for more
details.

BUG=b:181098581
BRANCH=None
TEST=./util/abuild/abuild -p none -t GOOGLE_KOHAKU -x -a -c max
     Make sure Jenkins verifies that builds on other boards

Change-Id: I1e196a1ed52d131a71f00cba1d93a23e54aca3e2
Signed-off-by: Shelley Chen <shchen@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57333
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>

3 files changed, 26 insertions, 18 deletions

diff --git a/src/device/Kconfig b/src/device/Kconfig
index ea3e241c82..cd8d8e9873 100644
--- a/src/device/Kconfig
+++ b/src/device/Kconfig
@@ -499,13 +499,21 @@ config PCI
 
 if PCI
 
-config NO_MMCONF_SUPPORT
+config NO_ECAM_MMCONF_SUPPORT
 	bool
 	default n
+	help
+	  Disable the use of the Enhanced Configuration
+	  Access mechanism (ECAM) method for accessing PCI config
+	  address space.
 
-config MMCONF_SUPPORT
+config ECAM_MMCONF_SUPPORT
 	bool
-	default !NO_MMCONF_SUPPORT
+	default !NO_ECAM_MMCONF_SUPPORT
+	help
+	  Enable the use of the Enhanced Configuration
+	  Access mechanism (ECAM) method for accessing PCI config
+	  address space.
 
 config PCIX_PLUGIN_SUPPORT
 	bool
@@ -540,20 +548,20 @@ config PCIEXP_PLUGIN_SUPPORT
 	bool
 	default y
 
-config MMCONF_BASE_ADDRESS
+config ECAM_MMCONF_BASE_ADDRESS
 	hex
-	depends on MMCONF_SUPPORT
+	depends on ECAM_MMCONF_SUPPORT
 
-config MMCONF_BUS_NUMBER
+config ECAM_MMCONF_BUS_NUMBER
 	int
-	depends on MMCONF_SUPPORT
+	depends on ECAM_MMCONF_SUPPORT
 
-config MMCONF_LENGTH
+config ECAM_MMCONF_LENGTH
 	hex
-	depends on MMCONF_SUPPORT
-	default 0x04000000 if MMCONF_BUS_NUMBER = 64
-	default 0x08000000 if MMCONF_BUS_NUMBER = 128
-	default 0x10000000 if MMCONF_BUS_NUMBER = 256
+	depends on ECAM_MMCONF_SUPPORT
+	default 0x04000000 if ECAM_MMCONF_BUS_NUMBER = 64
+	default 0x08000000 if ECAM_MMCONF_BUS_NUMBER = 128
+	default 0x10000000 if ECAM_MMCONF_BUS_NUMBER = 256
 	default 0x0
 
 config PCI_ALLOW_BUS_MASTER
@@ -619,7 +627,7 @@ config PCIEXP_CLK_PM
 config PCIEXP_L1_SUB_STATE
 	prompt "Enable PCIe ASPM L1 SubState"
 	bool
-	depends on (MMCONF_SUPPORT || PCI_IO_CFG_EXT)
+	depends on (ECAM_MMCONF_SUPPORT || PCI_IO_CFG_EXT)
 	default n
 	help
 	  Detect and enable ASPM on PCIe links.
@@ -635,8 +643,8 @@ if PCIEXP_HOTPLUG
 
 config PCIEXP_HOTPLUG_BUSES
 	int "PCI Express Hotplug Buses"
-	default  8 if MMCONF_SUPPORT && MMCONF_BUS_NUMBER <=  64
-	default 16 if MMCONF_SUPPORT && MMCONF_BUS_NUMBER <= 128
+	default  8 if ECAM_MMCONF_SUPPORT && ECAM_MMCONF_BUS_NUMBER <=  64
+	default 16 if ECAM_MMCONF_SUPPORT && ECAM_MMCONF_BUS_NUMBER <= 128
 	default 32
 	help
 	  This is the number of buses allocated for hotplug PCI express
diff --git a/src/device/device_util.c b/src/device/device_util.c
index 7b72a94811..039e562b43 100644
--- a/src/device/device_util.c
+++ b/src/device/device_util.c
@@ -857,8 +857,8 @@ void fixed_io_resource(struct device *dev, unsigned long index,
 void mmconf_resource(struct device *dev, unsigned long index)
 {
 	struct resource *resource = new_resource(dev, index);
-	resource->base = CONFIG_MMCONF_BASE_ADDRESS;
-	resource->size = CONFIG_MMCONF_LENGTH;
+	resource->base = CONFIG_ECAM_MMCONF_BASE_ADDRESS;
+	resource->size = CONFIG_ECAM_MMCONF_LENGTH;
 	resource->flags = IORESOURCE_MEM | IORESOURCE_RESERVE |
 		IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED;
 
diff --git a/src/device/pci_ops.c b/src/device/pci_ops.c
index 76d5e96aec..a4ef4053a3 100644
--- a/src/device/pci_ops.c
+++ b/src/device/pci_ops.c
@@ -7,7 +7,7 @@
 #include <device/pci_ops.h>
 #include <device/pci_type.h>
 
-u8 *const pci_mmconf = (void *)(uintptr_t)CONFIG_MMCONF_BASE_ADDRESS;
+u8 *const pci_mmconf = (void *)(uintptr_t)CONFIG_ECAM_MMCONF_BASE_ADDRESS;
 
 /**
  * Given a device, a capability type, and a last position, return the next