summaryrefslogtreecommitdiff
path: root/src/device
diff options
context:
space:
mode:
authorShuo Liu <shuo.liu@intel.com>2024-03-30 00:37:55 +0800
committerLean Sheng Tan <sheng.tan@9elements.com>2024-05-07 10:20:11 +0000
commit0f3316bc71aab50dbd8464ee2fb5b680947f2ca5 (patch)
tree171b21354e0fc94c7a2acca3a8dd64e8da6ba6ad /src/device
parent775c0e6de28390ac0d5688bfce1d7437878eb55f (diff)
device/device_util: Add and use is_pci_bridge()
TEST=Build and boot on intel/archercity CRB Change-Id: Ied4921f7dc7e144e580d05d4f2262777aa59d895 Signed-off-by: Shuo Liu <shuo.liu@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/81566 Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/device')
-rw-r--r--src/device/device_util.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/src/device/device_util.c b/src/device/device_util.c
index 7dcf081820..d91df76cee 100644
--- a/src/device/device_util.c
+++ b/src/device/device_util.c
@@ -930,3 +930,8 @@ bool is_pci_dev_on_bus(const struct device *pci, unsigned int bus)
return is_pci(pci) && pci->upstream->segment_group == 0
&& pci->upstream->secondary == bus;
}
+
+bool is_pci_bridge(const struct device *pci)
+{
+ return is_pci(pci) && ((pci->hdr_type & 0x7f) == PCI_HEADER_TYPE_BRIDGE);
+}