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authorKyösti Mälkki <kyosti.malkki@gmail.com>2015-02-23 00:34:26 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2015-06-05 10:18:05 +0200
commit0a3d4e4b03edd272e2025d7acb4d34357671f46b (patch)
tree3890e07873ab949341e2795a83a6a42265f0cefe /src/device
parent3690727955683f0e9eecadac0d7cdc7276e66ade (diff)
AMD K8 fam10: Refactor HT link connection test
Change-Id: I1e935a6b848a59f7f2e58779bceea599032de9e3 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/8562 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <edward.ocallaghan@koparo.com> Reviewed-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Diffstat (limited to 'src/device')
-rw-r--r--src/device/hypertransport.c17
1 files changed, 17 insertions, 0 deletions
diff --git a/src/device/hypertransport.c b/src/device/hypertransport.c
index 584ac78457..5aea5e62c4 100644
--- a/src/device/hypertransport.c
+++ b/src/device/hypertransport.c
@@ -507,6 +507,23 @@ void ht_scan_bridge(struct device *dev)
do_pci_scan_bridge(dev, hypertransport_scan_chain_x);
}
+bool ht_is_non_coherent_link(struct bus *link)
+{
+ u32 link_type;
+ do {
+ link_type = pci_read_config32(link->dev, link->cap + 0x18);
+ } while (link_type & ConnectionPending);
+
+ if (!(link_type & LinkConnected))
+ return false;
+
+ do {
+ link_type = pci_read_config32(link->dev, link->cap + 0x18);
+ } while (!(link_type & InitComplete));
+
+ return !!(link_type & NonCoherent);
+}
+
/** Default device operations for hypertransport bridges */
static struct pci_operations ht_bus_ops_pci = {
.set_subsystem = 0,