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authorTimothy Pearson <tpearson@raptorengineeringinc.com>2015-06-11 16:14:15 -0500
committerMartin Roth <martinroth@google.com>2015-11-12 21:11:47 +0100
commitf3b9fd32658a9a6788b87431464b84cda3c3c24b (patch)
treec9ed16b0b11b97da2ca11cf26a284bb17303a127 /src/device
parent861f920cdfa1f8a322ecd2a56da8c8a9fdfd1155 (diff)
src/northbridge/amd/amdmct: Add option to override bad SPD checksum
Certain DIMMs, for example DIMMs on which the EEPROM has been modified by the end user, may not contain a valid SPD checksum. While this is not a normal condition, it may be useful to allow a checksum override while memory timing parameters are being altered, e.g. in the course of overclocking or underclocking, or when recovering from a bad SPD write. This is an advanced level feature primarily useful for debugging and development. Change-Id: Ia743a13348d0a6e5e4dfffa04ed9582e0f7f3dad Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com> Reviewed-on: http://review.coreboot.org/11987 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
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