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author | Ronald G. Minnich <rminnich@gmail.com> | 2016-11-04 11:27:25 -0700 |
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committer | Ronald G. Minnich <rminnich@gmail.com> | 2016-11-20 22:42:48 +0100 |
commit | 4e793ec358d2d2babf61e968e0836296ad2a9d71 (patch) | |
tree | eab38ebb6a7bef0c8f99e4c2b142c2b3206c5ea0 /src/device | |
parent | e258b9a2d52bb31d99405cad4b44047022dc4007 (diff) |
riscv: map first 4GiB of physical address space
o The first 4G of physical address space is now mapped at 0.
o The first 4G of physical address space is now mapped at 1 << 38.
o The first 2G of DRAM (2 - 4 GiB of physical address space)
is now mapped at the top of memory save for the last 4K
i.e. at 0xffffffff80000000, with SBI page at the very top.
Of these, we hope to remove the *most* of the
last one once the gcc toolchain
can handle linking programs that can run at "top 33 bits
of address not all ones (but bit 63 set)". The 4K mapping
of the top of the 64 bit address space will always remain,
however, for SBI calls.
Change-Id: I77b151720001bddad5563b0f8e1279abcea056fa
Reviewed-on: https://review.coreboot.org/17403
Tested-by: build bot (Jenkins)
Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Diffstat (limited to 'src/device')
0 files changed, 0 insertions, 0 deletions