diff options
author | robbie zhang <robbie.zhang@intel.com> | 2015-08-25 16:13:53 -0700 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2015-08-29 07:35:04 +0000 |
commit | fada85e655879efc3774fc602987b078bc20fb41 (patch) | |
tree | cac9085ab6be65b5ecc4e2418e07edfb2703eb6b /src/device/pciexp_device.c | |
parent | 302aeb7a4ee10897d42298726b85e2d0bb26e788 (diff) |
intel/kunimitsu: port the change from glados for correctly reading lid
switch and SPI write protect for fill_lb_gpios() to coreboot table.
BUG=chrome-os-partner:43707
BRANCH=none
TEST=build and boot on kunimits
Signed-off-by: robbie zhang <robbie.zhang@intel.com>
Change-Id: I82cd3f74d0ac26e369ee4274b2c65f4f93c1fd3b
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Original-Commit-Id: 804a8a60951321e1b5b1d7ddacb97ddbe0cd7680
Original-Change-Id: I31ed6c0e48089b84ef9d52753484253a091d5aa5
Original-Reviewed-on: https://chromium-review.googlesource.com/295580
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Commit-Queue: Wenkai Du <wenkai.du@intel.com>
Original-Tested-by: Wenkai Du <wenkai.du@intel.com>
Reviewed-on: http://review.coreboot.org/11436
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/device/pciexp_device.c')
0 files changed, 0 insertions, 0 deletions