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authorAaron Durbin <adurbin@chromium.org>2013-02-07 00:51:18 -0600
committerRonald G. Minnich <rminnich@gmail.com>2013-03-18 20:50:15 +0100
commit2ad1dbaf2a2dfe373ff89927202acc01e36c7cd4 (patch)
treea29fe94cc9daf897d563c61bc5b99325e91adf4c /src/device/pci_rom.c
parent38d9423dbe300514e1ba7224a962650980a96217 (diff)
haswell: move call site of save_mrc_data()
The save_mrc_data() was previously called conditionally in the raminit code. The save_mrc_data() function was called in the non-S3 wake paths. However, the common romstage_common() code was checking cbmem initialization things on s3 wake. Between the two callers cbmem_initialize() was being called twice in the non-s3 wake paths. Moreover, saving of the mrc data was not allowed when CONFIG_EARLY_CBMEM_INIT wasn't enabled. Therefore, move the save_mrc_data() to romstage_common. It already has the knowledge of the wake path. Also remove the CONFIG_EARLY_CBMEM_INIT requirement from save_mrc_data() as well as the call to cbmem_initialize(). Change-Id: I7f0e4d752c92d9d5eedb8fa56133ec190caf77da Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/2756 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/device/pci_rom.c')
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