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author | Ryan Chuang <ryan.chuang@mediatek.corp-partner.google.com> | 2021-07-06 17:12:27 +0800 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2021-07-07 14:49:15 +0000 |
commit | c6ed254835a731625cb2a7d0c7b91e98f518a3d6 (patch) | |
tree | 822937b84b44b9d424fca43bfac579b5210ae921 /src/device/pci_rom.c | |
parent | e53cbfdbf40332ce766ecd8490e97e986a057c45 (diff) |
vc/mediatek/mt8195: Improve settings of duty calibration
Signed-off-by: Ryan Chuang <ryan.chuang@mediatek.corp-partner.google.com>
Change-Id: Ic4aeaec947356001d073df72977899ca06b18bda
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56104
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Diffstat (limited to 'src/device/pci_rom.c')
0 files changed, 0 insertions, 0 deletions