diff options
| author | Liju-Clr Chen <liju-clr.chen@mediatek.com> | 2022-11-10 16:51:45 +0800 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-11-15 13:15:31 +0000 |
| commit | c5b32ee8d86c58e5df01efc27a89570e5389a719 (patch) | |
| tree | 4407aa24ce61ebefba8aaaeb569fd6579ece1724 /src/device/pci_rom.c | |
| parent | 89321cfff0b5b0e4244193081923327b4f06208e (diff) | |
mb/google/geralt: Enable RTC for eventlog timestamps
Without RTC, the timestamps in the eventlog are currently all
'2000-00-00 00:00:00'. Enable RTC to get the correct timestamps.
localhost ~ # head /var/log/eventlog.txt
0 | 2022-10-15 22:59:38 | Log area cleared | 4088
1 | 2022-10-15 22:59:38 | Memory Cache Update | Normal | Success
2 | 2022-10-15 22:59:45 | System boot | 0
3 | 2022-10-15 22:59:46 | Firmware vboot info | boot_mode=Developer |
fw_tried=A | fw_try_count=0 | fw_prev_tried=A | fw_prev_result=Unknown
localhost ~ #
localhost ~ # date
Sun Oct 16 01:42:59 PDT 2022
localhost ~ #
BUG=b:233720142
TEST=check the timestamp field in /var/log/eventlog.txt
Change-Id: Iddad102dc8d60de01a691d330deb8247e99c616a
Signed-off-by: Liju-Clr Chen <liju-clr.chen@mediatek.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69432
Reviewed-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Reviewed-by: Yidi Lin <yidilin@google.com>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/device/pci_rom.c')
0 files changed, 0 insertions, 0 deletions