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| author | FrankChu <frank_chu@pegatron.corp-partner.google.com> | 2020-12-16 16:32:18 +0800 |
|---|---|---|
| committer | Hung-Te Lin <hungte@chromium.org> | 2020-12-21 02:31:34 +0000 |
| commit | 8cb922346f118f139b5b8a76312a3c92b8cfb727 (patch) | |
| tree | d401a0018bb79dc93b56105f079ccde223fe09ae /src/device/pci_rom.c | |
| parent | d800d5e3ac740df608bc4dd2c0d16720aed45285 (diff) | |
mb/google/dedede: Update SPD table for galtic
galtic memory table as follow:
value Vendor Part number
0x00 MICRON MT53E512M32D2NP-046 WT:E
0x00 HYNIX H9HCNNNBKMMLXR-NEE
0x01 MICRON MT53E1G32D2NP-046 WT:A
0x02 HYNIX H9HCNNNCPMMLXR-NEE
BUG=b:170913840
BRANCH=none
TEST=emerge-dedede coreboot
Signed-off-by: FrankChu <frank_chu@pegatron.corp-partner.google.com>
Change-Id: I30b8fe3f14e1af7bb5760530477f9311c6a4ee62
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48655
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Diffstat (limited to 'src/device/pci_rom.c')
0 files changed, 0 insertions, 0 deletions