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authorShunqian Zheng <zhengsq@rock-chips.com>2016-04-13 22:34:39 +0800
committerPatrick Georgi <pgeorgi@google.com>2016-05-09 08:42:43 +0200
commit347c83cfc9310f640cd744856fc63e095a41680e (patch)
tree6e9adbedad4eeb4c3ccd17352850b0bc81933f81 /src/device/pci_rom.c
parenta1f873f0695a4ee59184296d72f187810f701196 (diff)
rockchip: rk3399: add spi clock driver
This patch implements spi clock driver and initialize SPI flash rom for the baseboard gru. There are 6 on-chip SPI controllers inside RK3399. For SPI3, it's source clk from ppll, while the others from gpll. Please refer to CRU session of TRM for detail. BRANCH=none BUG=chrome-os-partner:51537 TEST=emerge-kevin coreboot Change-Id: I597ae2cc8ba1bfaefdfbf6116027d009daa8e049 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 4c6a9b0aedd427727ed4f4a821c5c54fb3a174b9 Original-Change-Id: I68ad859bf4fc5dacaaee5a2cd33418c729cf39b8 Original-Signed-off-by: huang lin <hl@rock-chips.com> Original-Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com> Original-Reviewed-on: https://chromium-review.googlesource.com/338946 Original-Commit-Ready: Vadim Bendebury <vbendeb@chromium.org> Original-Tested-by: Vadim Bendebury <vbendeb@chromium.org> Original-Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://review.coreboot.org/14710 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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