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authorKyösti Mälkki <kyosti.malkki@gmail.com>2016-12-01 22:08:18 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2016-12-07 12:59:28 +0100
commit6f66f414a0907f79abf492cd9eca839c0849c7f6 (patch)
tree3e74145128261014798af58111db31d616fd43dd /src/device/pci_ops.c
parent891b6c4d199418a08ba88e42d6c8945ce05205f1 (diff)
PCI ops: MMCONF_SUPPORT_DEFAULT is required
Doing PCI config operations via MMIO window by default is a requirement, if supported by the platform. This means chipset or CPU code must enable MMCONF operations early in bootblock already, or before platform-specific romstage entry. Platforms are allowed to have NO_MMCONF_SUPPORT only in the case it is actually not implemented in the silicon. Change-Id: Id4d9029dec2fe195f09373320de800fcdf88c15d Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/17693 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/device/pci_ops.c')
-rw-r--r--src/device/pci_ops.c7
1 files changed, 3 insertions, 4 deletions
diff --git a/src/device/pci_ops.c b/src/device/pci_ops.c
index 2f896d2bcc..b6fc32d6cf 100644
--- a/src/device/pci_ops.c
+++ b/src/device/pci_ops.c
@@ -22,11 +22,10 @@
const struct pci_bus_operations *pci_bus_default_ops(device_t dev)
{
-#if CONFIG_MMCONF_SUPPORT_DEFAULT
+ if (IS_ENABLED(CONFIG_NO_MMCONF_SUPPORT))
+ return &pci_cf8_conf1;
+
return &pci_ops_mmconf;
-#else
- return &pci_cf8_conf1;
-#endif
}
static const struct pci_bus_operations *pci_bus_ops(struct bus *bus, struct device *dev)