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authorDavid Hendricks <dhendrix@chromium.org>2013-08-08 14:09:46 -0700
committerPatrick Georgi <patrick@georgi-clan.de>2013-12-21 22:46:05 +0100
commite0cfad2b563a26365041dcf75fe7b8302fcab5a4 (patch)
tree1fc17da5532a6c089e96807149aeada1b74b95be /src/device/pci_ops.c
parentb9f267ce231635029d37d42d31702ab979784da5 (diff)
exynos5420: re-factor the SDMMC GPIO config routines
The existing GPIO config routines for SDMMC0-2 are over-generalized and somewhat confusing as a result. It would work nicely if all SDMMC ports were configured in the same fashion, but there are a few exceptions. For example, the inner function runs differently if we're using 8 bits of data instead of 4, so a big chunk is skipped for SDMMC2. SDMMC0 requires SD_0_CDn to be an output rather than alternate function and must have a value set. This patch trades some verbosity for simplicy. Now the SDMMC GPIO configuration a straight-forward sequence of GPIO operations without any exceptions. Signed-off-by: David Hendricks <dhendrix@chromium.org> Change-Id: If75075b24c6588c4c1b3be3fb9b1aa95e2fac2d1 Reviewed-on: https://gerrit.chromium.org/gerrit/65248 Reviewed-by: Gabe Black <gabeblack@chromium.org> Commit-Queue: David Hendricks <dhendrix@chromium.org> Tested-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: http://review.coreboot.org/4446 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src/device/pci_ops.c')
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