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| author | Maxim Polyakov <max.senia.poliak@gmail.com> | 2020-04-26 21:14:21 +0300 |
|---|---|---|
| committer | Andrey Petrov <andrey.petrov@gmail.com> | 2020-04-30 22:15:36 +0000 |
| commit | c00f74a82c7b6eb42c0e4c3ca7604f0947cf0691 (patch) | |
| tree | 75f307898efde596a09738449293c2a120aeb725 /src/device/pci_ops.c | |
| parent | 04a2edf689f79ffeb540c3e39e8893e75d5efd7a (diff) | |
mb/cedarisland_crb: exclude GPIOs reconfiguration by FSP-M
We should be sure that after romstage the pads will be configured
according to the config from gpio.h only. This patch sets the GPIO
configuration from gpio.h using the soc/intel/common/gpio.c driver
again in ramstage.
[1] https://review.coreboot.org/c/coreboot/+/40730
Change-Id: Ic49e504d96fe4fd44434e7b981f8d8d9e76880ef
Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40735
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Andrey Petrov <andrey.petrov@gmail.com>
Diffstat (limited to 'src/device/pci_ops.c')
0 files changed, 0 insertions, 0 deletions