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authorKyösti Mälkki <kyosti.malkki@gmail.com>2019-01-23 16:46:35 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2019-07-04 09:36:19 +0000
commit9c0e14e7c43e85e99c0bbfdff72019d908de1711 (patch)
treeef1a0ffee2d7a542a2c8ccb8d2f8cba74114628b /src/device/pci_device.c
parentdace2498ecfadf645599aaa3ba8fef8cbb111c2d (diff)
device/pci_ops: Define pci_find_capability() just once
Wrap the simple romstage implementation to be called from ramstage. Change-Id: Iadadf3d550416850d6c37233bd4eda025f4d3960 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/31755 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/device/pci_device.c')
-rw-r--r--src/device/pci_device.c67
1 files changed, 0 insertions, 67 deletions
diff --git a/src/device/pci_device.c b/src/device/pci_device.c
index 31c35dc02e..a2af0ec999 100644
--- a/src/device/pci_device.c
+++ b/src/device/pci_device.c
@@ -102,73 +102,6 @@ u32 pci_moving_config32(struct device *dev, unsigned int reg)
}
/**
- * Given a device, a capability type, and a last position, return the next
- * matching capability. Always start at the head of the list.
- *
- * @param dev Pointer to the device structure.
- * @param cap PCI_CAP_LIST_ID of the PCI capability we're looking for.
- * @param last Location of the PCI capability register to start from.
- * @return The next matching capability.
- */
-unsigned pci_find_next_capability(struct device *dev, unsigned cap,
- unsigned last)
-{
- unsigned pos = 0;
- u16 status;
- unsigned reps = 48;
-
- status = pci_read_config16(dev, PCI_STATUS);
- if (!(status & PCI_STATUS_CAP_LIST))
- return 0;
-
- switch (dev->hdr_type & 0x7f) {
- case PCI_HEADER_TYPE_NORMAL:
- case PCI_HEADER_TYPE_BRIDGE:
- pos = PCI_CAPABILITY_LIST;
- break;
- case PCI_HEADER_TYPE_CARDBUS:
- pos = PCI_CB_CAPABILITY_LIST;
- break;
- default:
- return 0;
- }
-
- pos = pci_read_config8(dev, pos);
- while (reps-- && (pos >= 0x40)) { /* Loop through the linked list. */
- int this_cap;
-
- pos &= ~3;
- this_cap = pci_read_config8(dev, pos + PCI_CAP_LIST_ID);
- printk(BIOS_SPEW, "Capability: type 0x%02x @ 0x%02x\n",
- this_cap, pos);
- if (this_cap == 0xff)
- break;
-
- if (!last && (this_cap == cap))
- return pos;
-
- if (last == pos)
- last = 0;
-
- pos = pci_read_config8(dev, pos + PCI_CAP_LIST_NEXT);
- }
- return 0;
-}
-
-/**
- * Given a device, and a capability type, return the next matching
- * capability. Always start at the head of the list.
- *
- * @param dev Pointer to the device structure.
- * @param cap PCI_CAP_LIST_ID of the PCI capability we're looking for.
- * @return The next matching capability.
- */
-unsigned int pci_find_capability(struct device *dev, unsigned int cap)
-{
- return pci_find_next_capability(dev, cap, 0);
-}
-
-/**
* Given a device and register, read the size of the BAR for that register.
*
* @param dev Pointer to the device structure.