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authorPaul Menzel <pmenzel@molgen.mpg.de>2022-09-06 08:25:28 +0200
committerMartin Roth <martin.roth@amd.corp-partner.google.com>2022-09-08 14:20:30 +0000
commitd579d80d75d1adf141e8e15b17eeac50f41e881e (patch)
treeb8110874f84fccd9d5359d92b9756741122e53a2 /src/device/pci_device.c
parenta16ed34638b32abe188c08f5027371658a299a1f (diff)
device/pci_device: Add missing spaces to log messages
Add the missing spaces to two log message, like the one below. WARNING: Device PCI: 03:00.0 requests a BAR with34 bits of address space, which coreboot is notconfigured to hand out, truncating to 29 bits Change-Id: If933d8fb0db5b58ff12f043cc73172a3f6ffc624 Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/67370 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
Diffstat (limited to 'src/device/pci_device.c')
-rw-r--r--src/device/pci_device.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/src/device/pci_device.c b/src/device/pci_device.c
index 52107f2fd3..70af9c558a 100644
--- a/src/device/pci_device.c
+++ b/src/device/pci_device.c
@@ -409,8 +409,8 @@ static void configure_adjustable_base(const struct device *dev,
int max_requested_bits = __fls64(size_mask);
if (max_requested_bits > CONFIG_PCIEXP_DEFAULT_MAX_RESIZABLE_BAR_BITS) {
printk(BIOS_WARNING, "WARNING: Device %s requests a BAR with"
- "%u bits of address space, which coreboot is not"
- "configured to hand out, truncating to %u bits\n",
+ " %u bits of address space, which coreboot is not"
+ " configured to hand out, truncating to %u bits\n",
dev_path(dev), max_requested_bits,
CONFIG_PCIEXP_DEFAULT_MAX_RESIZABLE_BAR_BITS);
max_requested_bits = CONFIG_PCIEXP_DEFAULT_MAX_RESIZABLE_BAR_BITS;
@@ -418,8 +418,8 @@ static void configure_adjustable_base(const struct device *dev,
if (!(res->flags & IORESOURCE_PCI64) && max_requested_bits > 32) {
printk(BIOS_ERR, "ERROR: Resizable BAR requested"
- "above 32 bits, but PCI function reported a"
- "32-bit BAR.");
+ " above 32 bits, but PCI function reported a"
+ " 32-bit BAR.");
return;
}