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authorAaron Durbin <adurbin@chromium.org>2018-03-16 12:55:58 -0600
committerAaron Durbin <adurbin@chromium.org>2018-03-17 02:06:08 +0000
commitfd228e979c37b66111ba1405875b08182c8d993d (patch)
treea1e8e19c55e1325fceba4b47c1c522e091a80ee3 /src/device/pci_device.c
parenta9f49366c09f8902a13221185449a1d0870af1c6 (diff)
soc/intel/apollolake: handle different memory profiles for apl and glk
glk has different memory profile values than apl. Therefore, a translation is required to correctly set the proper profile value depending on what SoC (and therefore FSP) is being used. Based on SOC_INTEL_GLK Kconfig value use different profiles. BUG=b:74932341 Change-Id: I6ea84d3339caf666aea5034ab8f0287bd1915e06 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/25249 Reviewed-by: Justin TerAvest <teravest@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/device/pci_device.c')
0 files changed, 0 insertions, 0 deletions