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| author | Kevin Hsieh <kevin.hsieh@intel.com> | 2014-11-26 03:08:18 +0800 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2015-04-10 20:04:49 +0200 |
| commit | d946f5e61d0c8966bec57f7d3961e41555b5299a (patch) | |
| tree | 3818b315a3e2ab365789bf2047492d9f5badb73b /src/device/pci_device.c | |
| parent | 47f112cf80b108066ea7693501665371b8fd41fd (diff) | |
Baytrail: Prior to PCI scan, wait for LCTL to be active in 50 ms
Using REG_PCI_POLL32 to check if the LINK is active with 50ms timeout.
BRANCH=none
BUG=chromium:431169
TEST=Test on Enguarde, compile ok and boot OS
Change-Id: If98ab4e31d17ec4e62d68b93edcec6d9aee87367
Signed-off-by: Stefan Reinauer <reinauer@chromium.org>
Original-Commit-Id: cf692ae9aebb43ab46cb07d36b62b300b16be1dc
Original-Change-Id: I490e6ffa40979628edf52a7444808b6d25a6e83d
Original-Signed-off-by: Kevin Hsieh <kevin.hsieh@intel.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/231777
Original-Reviewed-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: http://review.coreboot.org/9478
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/device/pci_device.c')
0 files changed, 0 insertions, 0 deletions