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authorAngel Pons <th3fanbus@gmail.com>2020-07-25 14:57:06 +0200
committerAngel Pons <th3fanbus@gmail.com>2020-07-26 20:53:23 +0000
commitd8f44360054b6f63d4cf76be179c4d1193e456ae (patch)
tree53231193564a5610413ea674c8962b56b460b8ac /src/device/pci_class.c
parenta7d92668326adbe61d29b476cd4676decca131eb (diff)
mb/intel/saddlebrook/devicetree.cb: Use PCH_IRQ* macros
Tested with BUILD_TIMELESS=1, its coreboot.rom does not change. Change-Id: I6375f97bc2a30beba5882792328f26e0675621cc Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/43867 Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/device/pci_class.c')
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