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authorFurquan Shaikh <furquan@google.com>2015-07-10 15:25:26 -0700
committerPatrick Georgi <pgeorgi@google.com>2015-07-13 10:01:39 +0200
commit6e1dc0cd602cea4d2b401970b032dadf2a082346 (patch)
tree2fcfd87074ae43c5851e9753675e8567f492c9ed /src/device/pci_class.c
parent8799fde76062b381721ad856fb382983b98c52a5 (diff)
arm64: Define stage_entry as weak symbol
This allows SoCs/CPUs to have custom stage_entry in order to apply any fixups that need to run before standard cpu reset procedure. BUG=chrome-os-partner:41877 BRANCH=None TEST=Compiles successfully Change-Id: Iaae7636349140664b19e81b0082017b63b13f45b Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 498d04b0e9a3394943f03cad603c30ae8b3805d4 Original-Change-Id: I9a005502d4cfcb76017dcae3a655efc0c8814a93 Original-Signed-off-by: Furquan Shaikh <furquan@google.com> Original-Reviewed-on: https://chromium-review.googlesource.com/284867 Original-Trybot-Ready: Furquan Shaikh <furquan@chromium.org> Original-Tested-by: Furquan Shaikh <furquan@chromium.org> Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Commit-Queue: Furquan Shaikh <furquan@chromium.org> Reviewed-on: http://review.coreboot.org/10897 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/device/pci_class.c')
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