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authorFelix Held <felix-coreboot@felixheld.de>2023-08-12 00:30:36 +0200
committerFelix Held <felix-coreboot@felixheld.de>2023-08-15 14:45:20 +0000
commit38880d236fd97e3bdf61234363bc4cd7e9869870 (patch)
tree877e33dcdead83939b9c2219d33868f71eb1db35 /src/device/oprom
parent6e039076ab106a11ec9f82ef2f8250b20f1a885e (diff)
device/oprom/realmode/x86: temporary disable NULL breakpoints
Disable NULL breakpoints in setup_realmode_idt before calling write_idt_stub in a loop. TEST=No more spurious Null dereference errors in the console output. Before Mandolin showed these two errors before running the VBIOS: [ERROR] Null dereference at eip: 0x4e6f1a35 [ERROR] Null dereference at eip: 0x4e6f1a4f Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I2255d85030e41192ae8a3a7f0f6576c0d373eead Reviewed-on: https://review.coreboot.org/c/coreboot/+/77172 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
Diffstat (limited to 'src/device/oprom')
-rw-r--r--src/device/oprom/realmode/x86.c9
1 files changed, 8 insertions, 1 deletions
diff --git a/src/device/oprom/realmode/x86.c b/src/device/oprom/realmode/x86.c
index 7972011a3f..367614db2b 100644
--- a/src/device/oprom/realmode/x86.c
+++ b/src/device/oprom/realmode/x86.c
@@ -2,6 +2,7 @@
#include <device/mmio.h>
#include <arch/interrupt.h>
+#include <arch/null_breakpoint.h>
#include <arch/registers.h>
#include <boot/coreboot_tables.h>
#include <console/console.h>
@@ -178,15 +179,21 @@ static void setup_realmode_idt(void)
struct realmode_idt *idts = (struct realmode_idt *) 0;
int i;
+ /* It's expected that we write to the NULL page in the first two iterations of the
+ following loop, so temporarily disable the NULL breakpoint. */
+ null_breakpoint_disable();
+
/* Copy IDT stub code for each interrupt. This might seem wasteful
* but it is really simple
*/
- for (i = 0; i < 256; i++) {
+ for (i = 0; i < 256; i++) {
idts[i].cs = 0;
idts[i].offset = 0x1000 + (i * __idt_handler_size);
write_idt_stub((void *)((uintptr_t)idts[i].offset), i);
}
+ null_breakpoint_init();
+
/* Many option ROMs use the hard coded interrupt entry points in the
* system bios. So install them at the known locations.
*/