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authorKarthikeyan Ramasubramanian <kramasub@google.com>2020-02-28 16:25:08 -0700
committerPatrick Georgi <pgeorgi@google.com>2020-03-09 21:28:56 +0000
commit4ebe6dff1a9b2643e739371d3399f25a2c0e68a2 (patch)
treeff30b8f90e8e5687de1495a66d6c343348bb6b0d /src/device/oprom/yabel
parentc83c5af3ae0e52c54ce4cc42134697d2d3ecfc60 (diff)
mb/google/dedede: Add PCIe Root Port Configuration
Add configuration for all the PCIe Root ports and Clock Source. Configure the Root Ports as disabled and clock sources as not used. BUG=None TEST=Build the mainboard. Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Change-Id: I0a1ad7e056907e454a93f51c84e1d99f08b7bdef Reviewed-on: https://review.coreboot.org/c/coreboot/+/39166 Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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