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authorSubrata Banik <subrata.banik@intel.com>2018-05-04 13:43:15 +0530
committerSubrata Banik <subrata.banik@intel.com>2018-05-05 03:04:14 +0000
commitdc23396a30bf13450f409eb9ed242ddc57283354 (patch)
treed6be32226adf8575e4f4c3089408ce2f59fd63b9 /src/device/oprom/x86emu/ops.h
parent99bacb7285228ed317c8abe190e9b5e0f2613bd7 (diff)
soc/intel/cannonlake: Include stage cache support for CNL
TEST=Build and boot cannonlake rvp. cpu_index() returns correct cpu index based on caller. Change-Id: I23f80ef455d075a14121577f401cfc7c44ba0cfa Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/26052 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/device/oprom/x86emu/ops.h')
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