diff options
| author | Martin Roth <martin.roth@se-eng.com> | 2013-07-08 16:24:19 -0600 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2013-07-10 20:17:25 +0200 |
| commit | 63373edce006983d1e2aef7d71c1653ae337ed18 (patch) | |
| tree | fdc6a687ac72663e19767296eb8cd25ee0d99c0e /src/device/oprom/x86emu/decode.c | |
| parent | 50d887d4f4f5f4c4717a2308f4bf069d86ca4ff7 (diff) | |
device: Fix spelling
Change-Id: I53a40d114aa2da76398c5b97443d4096809dcf36
Signed-off-by: Martin Roth <martin.roth@se-eng.com>
Reviewed-on: http://review.coreboot.org/3730
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/device/oprom/x86emu/decode.c')
| -rw-r--r-- | src/device/oprom/x86emu/decode.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/src/device/oprom/x86emu/decode.c b/src/device/oprom/x86emu/decode.c index ed96dc66e6..3d3f77dd1d 100644 --- a/src/device/oprom/x86emu/decode.c +++ b/src/device/oprom/x86emu/decode.c @@ -33,7 +33,7 @@ * Developer: Kendall Bennett * * Description: This file includes subroutines which are related to -* instruction decoding and accessess of immediate data via IP. etc. +* instruction decoding and accesses of immediate data via IP. etc. * ****************************************************************************/ @@ -43,7 +43,7 @@ /**************************************************************************** REMARKS: -Handles any pending asychronous interrupts. +Handles any pending asynchronous interrupts. ****************************************************************************/ static void x86emu_intr_handle(void) { @@ -77,7 +77,7 @@ next instruction. void x86emu_intr_raise( u8 intrnum) { - printf("%s, raising exeception %x\n", __func__, intrnum); + printf("%s, raising exception %x\n", __func__, intrnum); x86emu_dump_regs(); M.x86.intno = intrnum; M.x86.intr |= INTR_SYNCH; @@ -243,7 +243,7 @@ no segment override. Address modes such as -3[BP] or 10[BP+SI] all refer to addresses relative to SS (ie: on the stack). So, at the minimum, all decodings of addressing modes would have to set/clear a bit describing whether the access is relative to DS or SS. That is the function of the -cpu-state-varible M.x86.mode. There are several potential states: +cpu-state-variable M.x86.mode. There are several potential states: repe prefix seen (handled elsewhere) repne prefix seen (ditto) @@ -255,7 +255,7 @@ cpu-state-varible M.x86.mode. There are several potential states: gs segment override ss segment override - ds/ss select (in absense of override) + ds/ss select (in absence of override) Each of the above 7 items are handled with a bit in the mode field. ****************************************************************************/ |