summaryrefslogtreecommitdiff
path: root/src/device/dram/ddr4.c
diff options
context:
space:
mode:
authorAngel Pons <th3fanbus@gmail.com>2021-03-28 13:57:47 +0200
committerAngel Pons <th3fanbus@gmail.com>2021-04-05 13:02:00 +0000
commit6c6e0492829771a63c5c175d5c7f431fc7447442 (patch)
tree844b629edbccb92022b43151e64474e93f40815a /src/device/dram/ddr4.c
parentacd30e90172084e1405a16405ec1f682b32d8985 (diff)
device/dram/ddr4.h: Align with DDR3 and DDR2
Drop unnecessary typedefs and rename DDR4-specific definitions to avoid name clashes, as done for DDR3 in earlier commits. This allows including and using both DDR3 and DDR4 headers in the same compilation unit. Change-Id: I17f1cd88f83251ec23e9783a617f4d2ed41b07f0 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/51898 Reviewed-by: Michael Niewöhner <foss@mniewoehner.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/device/dram/ddr4.c')
-rw-r--r--src/device/dram/ddr4.c12
1 files changed, 6 insertions, 6 deletions
diff --git a/src/device/dram/ddr4.c b/src/device/dram/ddr4.c
index e670b20f72..cc66dccfea 100644
--- a/src/device/dram/ddr4.c
+++ b/src/device/dram/ddr4.c
@@ -163,7 +163,7 @@ uint16_t ddr4_speed_mhz_to_reported_mts(uint16_t speed_mhz)
* SPD_STATUS_INVALID -- invalid SPD or not a DDR4 SPD
* SPD_STATUS_CRC_ERROR -- checksum mismatch
*/
-int spd_decode_ddr4(dimm_attr *dimm, spd_raw_data spd)
+int spd_decode_ddr4(struct dimm_attr_ddr4_st *dimm, spd_raw_data spd)
{
u8 reg8;
u8 bus_width, sdram_width;
@@ -261,7 +261,7 @@ int spd_decode_ddr4(dimm_attr *dimm, spd_raw_data spd)
}
enum cb_err spd_add_smbios17_ddr4(const u8 channel, const u8 slot, const u16 selected_freq,
- const dimm_attr *info)
+ const struct dimm_attr_ddr4_st *info)
{
struct memory_info *mem_info;
struct dimm_info *dimm;
@@ -298,16 +298,16 @@ enum cb_err spd_add_smbios17_ddr4(const u8 channel, const u8 slot, const u16 sel
dimm->mod_id = info->manufacturer_id;
switch (info->dimm_type) {
- case SPD_DIMM_TYPE_SO_DIMM:
+ case SPD_DDR4_DIMM_TYPE_SO_DIMM:
dimm->mod_type = SPD_SODIMM;
break;
- case SPD_DIMM_TYPE_72B_SO_RDIMM:
+ case SPD_DDR4_DIMM_TYPE_72B_SO_RDIMM:
dimm->mod_type = SPD_72B_SO_RDIMM;
break;
- case SPD_DIMM_TYPE_UDIMM:
+ case SPD_DDR4_DIMM_TYPE_UDIMM:
dimm->mod_type = SPD_UDIMM;
break;
- case SPD_DIMM_TYPE_RDIMM:
+ case SPD_DDR4_DIMM_TYPE_RDIMM:
dimm->mod_type = SPD_RDIMM;
break;
default: