diff options
| author | Andrey Petrov <anpetrov@fb.com> | 2019-08-01 14:18:06 -0700 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2019-08-14 03:35:29 +0000 |
| commit | 3f85edbcc554c4db704ed23bdfb1f384f5e2239e (patch) | |
| tree | c475615f6ac1e05cdab1d0a58a9b8e0b97c10230 /src/device/dram/ddr3.c | |
| parent | bb9506121f709f452d18d135ed163166f76e44e4 (diff) | |
dram: Add basic DDR4 SPD parsing
Add ability to decode basic fields of DDR4 SPDs and produce SMBIOS table
17. XMP, schemas, extended field parising is totally not yet implemented.
Also, put CRC function used in DDR2, DDR3 and DDR4 ina common file.
Signed-off-by: Andrey Petrov <anpetrov@fb.com>
Change-Id: If3befbc55cf37e1018baa432cb2f03743b929211
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34680
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
Diffstat (limited to 'src/device/dram/ddr3.c')
| -rw-r--r-- | src/device/dram/ddr3.c | 23 |
1 files changed, 3 insertions, 20 deletions
diff --git a/src/device/dram/ddr3.c b/src/device/dram/ddr3.c index 834dc83db6..4a900fab47 100644 --- a/src/device/dram/ddr3.c +++ b/src/device/dram/ddr3.c @@ -23,6 +23,7 @@ #include <console/console.h> #include <device/device.h> #include <device/dram/ddr3.h> +#include <device/dram/common.h> #include <string.h> #include <memory_info.h> #include <cbmem.h> @@ -50,24 +51,6 @@ int spd_dimm_is_registered_ddr3(enum spd_dimm_type type) return 0; } -u16 ddr3_crc16(const u8 *ptr, int n_crc) -{ - int i; - u16 crc = 0; - - while (--n_crc >= 0) { - crc = crc ^ ((int)*ptr++ << 8); - for (i = 0; i < 8; ++i) - if (crc & 0x8000) { - crc = (crc << 1) ^ 0x1021; - } else { - crc = crc << 1; - } - } - - return crc; -} - /** * \brief Calculate the CRC of a DDR3 SPD * @@ -91,7 +74,7 @@ u16 spd_ddr3_calc_crc(u8 *spd, int len) /* Not enough bytes available to get the CRC */ return 0; - return ddr3_crc16(spd, n_crc); + return ddr_crc16(spd, n_crc); } /** @@ -108,7 +91,7 @@ u16 spd_ddr3_calc_unique_crc(u8 *spd, int len) /* Not enough bytes available to get the CRC */ return 0; - return ddr3_crc16(&spd[117], 11); + return ddr_crc16(&spd[117], 11); } /** |