Add buffer_to/from_fifo32(_prefix) helpers

Many peripheral drivers across different SoCs regularly face the same
task of piping a transfer buffer into (or reading it out of) a 32-bit
FIFO register. Sometimes it's just one register, sometimes a whole array
of registers. Sometimes you actually transfer 4 bytes per register
read/write, sometimes only 2 (or even 1). Sometimes writes need to be
prefixed with one or two command bytes which makes the actual payload
buffer "misaligned" in relation to the FIFO and requires a bunch of
tricky bit packing logic to get right. Most of the times transfer
lengths are not guaranteed to be divisible by 4, which also requires a
bunch of logic to treat the potential unaligned end of the transfer
correctly.

We have a dozen different implementations of this same pattern across
coreboot. This patch introduces a new family of helper functions that
aims to solve all these use cases once and for all (*fingers crossed*).

Change-Id: Ia71f66c1cee530afa4c77c46a838b4de646ffcfb
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34850
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>

1 files changed, 5 insertions, 0 deletions

diff --git a/src/device/Makefile.inc b/src/device/Makefile.inc
index baa45bec3e..966ca0d198 100644
--- a/src/device/Makefile.inc
+++ b/src/device/Makefile.inc
@@ -53,3 +53,8 @@ verstage-y += i2c.c
 romstage-y += i2c.c
 ramstage-y += i2c.c
 ramstage-y += i2c_bus.c
+
+bootblock-y += mmio.c
+verstage-y += mmio.c
+romstage-y += mmio.c
+ramstage-y += mmio.c