mb/google/sarien: Setup GPIOs again after FSP-S

Currently CoffeeLake FSP is incorrectly modifying GPIO pad configuration
if specific UPD variables are not set as it expects.

This affects the display-related SOC pads with the following UPD variables:

UINT8 DdiPortBHpd; // GPP_E13
UINT8 DdiPortCHpd; // GPP_E14
UINT8 DdiPortDHpd; // GPP_E15
UINT8 DdiPortFHpd; // GPP_E16
UINT8 DdiPortBDdc; // GPP_E18/GPP_E19
UINT8 DdiPortCDdc; // GPP_E20/GPP_E21
UINT8 DdiPortDDdc; // GPP_E22/GPP_E23
UINT8 DdiPortFDdc; // GPP_H16/GPP_H17

Until FSP is fixed to not touch the pad configuration this workaround
will reprogram the GPIO settings after FSP-S step so they are correct
when the OS attempts to use them.

This was found in CoffeLake FSP Gold release:
https://github.com/IntelFsp/FSP/tree/master/CoffeeLakeFspBinPkg

As well as the current top-of-tree for the FSP sources.

BUG=b:120686247,chromium:913216
TEST=verify correct GPIO configuration for GPP_E group in the kernel

Change-Id: I19550c4347cf65d409de6a8638619270372c4d0a
Signed-off-by: Duncan Laurie <dlaurie@google.com>
Reviewed-on: https://review.coreboot.org/c/30113
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Lijian Zhao <lijian.zhao@intel.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>

0 files changed, 0 insertions, 0 deletions